Embedded system
Abstract
The assignment was purposely carried out to devices a microprocessor structural design with an identification number 68HC11.It was to be reproduced and put into practice using on an FPGA. The proposal has been passed to device an architecture scheme that is compatible to the original Microprocessor but in this case should be less functional and use minimum funds than the actual machine. Minute elements that combined together add up to the required system. In this study the chain of architectural scheme on the Microprocessor is embraced at large, after which architecture based on DE-1 board is devised from ALTERA with Cyclone II FPGA is executed.
Introduction and Overall Aim
This is an imperative and vital aspect in the device of the VHDL module, for this type of module functions the same as the later (68HCILl) which in this case is a very small controller in comparison to the original structure. Proposals were made in one accord to come up with a device on 68CHII sample which should be directly posted on the board. In essence, the scheme to be created should equally resemble the initial structure and the practice should be performed using the DE-I FPGA BOARDS. It has also been discussed at length a well-suited architecture that denotes a Microprocessor ought to be developed .The expected structures should use minimum resources in regard to the memory capacitance and have less functions in relation ton the computational dilemma. In achieving the objective a sequential flow of system was to be followed.
Design Methodology
The principle objective in the method used in developing the architecture was as follows. Small components that build up the structure of the scheme are to be collected then they are integrated together to develop in to a figure that should look the same as the Microcontroller that works with an FPGA.In the method employed various design elements are used, which comprises of ,the additional or subtract ional circuit , the accumulator circuit. In the memory fixation the ROM and the RAM are to be used, while the arithmetic logic unit (ALU) is used in solving the computational problems.
Add or the Subtract methodology
This is one of the simplest and fundamental methodologies used in the design of the Microcontroller. Though it has some defects in its performance it is termed as the best method. Moreover it is also used in carrying out some other functions that are not related to this assignment. Arithmetic and logic unit is also used in performing alike functions in the microcontroller scheme. This following inputs and outputs best describes how the method functions.
Add sub: This regulates the Signal by pointing on the additional and subtractional gargets and immediately the signal performs as it has been directed. If the signal indicates a low signal, that accounts for an addition and vice versa for a subtraction.
Another outstanding input on this method is the ‘carry in single bit input”which is abbreviated as Cin, and is used in computing for additions. A (7:0):8 and B (7:0):8 are used both the additional and subtractional purposes .Another input device is the Clk, which is better known Clock synchronize which performs as module in the input method. The inputs will result in the following outputs and this comprises of Outp (7:0) which is the outcome of the additional or subtraction operations, while the Ove (overflow flag) depicts the end results on the calculation. Cout, (carry out bit) is the last output material and this will account for the summation of two operations.
The accumulator Circuit
As the name suggests the methodology is used in numerous Microcontroller operations because it contains both a main and an elementary constituent. The extra function that this methodology employs is that it is capable of mounting up the addition and subtraction outcomes and subsequently uses them in the coming operation or either supplements them as yield for next operation. A valid example this case the PC, well known as the Program counter.
This system actually stocks up preceding counts, enhanced by the program and then adds (1) to the previous computation with an aim of accumulating them for a considerate outcome. In relation to it the below inputs and outputs concisely emphasizes on it is operations. Add Sub; the signal is the one that depicts the arithmetical operation to used, if the operation to be performed is low then this will account for addition and vice versa. The other elements, Cin, A (7:0):8, B (7:0):8, Clk all this accounts are as explained above. The distinguishing factor in this method is the Clr, constituent which denotes that when the signal is high the circuit is automatically reset. The outputs related to the methodology are described below,
Output (7:0), which operates as ether in the additional or subtraction scenario, while as Ove portrays the outcome based on the arithmetic process. The cout is a description of two operations.
Read only Memory (ROM)
This is one of the major module that accounts as the principle component In the structure system that is involved in any calculation system. The same application is used as a device in the present assignment being discussed. The ROM better referred as the read only memory is principally used to stock up guidelines that are operated by the Micron controller.
The directions are accumulated in form of Consecutive Memory Location in the instructions store and then collected by offering the address key to access the memory location store. The guidelines collected are then transported to the Micro-programmed –control unit via a path known as the data bus. The micro-programmed unit is also known as the central processing unit and in this unit more directions are provided concerning the data. The Read only module contains the following inputs and output in the architecture operations.
Address (4:0): which concisely means the required address that has an access to the memory location. The other input in this module is the Clock, this precisely harmonies the whole system by ensuring everything is working as required. The outputs denoted by this type of module are only one which is identified as Q(7:0):.This is the raw information which has been condensed and stocked in the memory location and is only accessible through the ROM address. Depending on the volume of information this module may have numerous sites for locating memory which are identified by counting the bits.The length of module is determined by adding up the memory locations while the width is the stored number of bits and are raised to a power of 2 to determine their actual quantity.ROM is an dependent module since it is choice is determined by the system prerequisites and the constraints underlying the designs.
Register Select Logic for the Rom Module
This type of module is mainly regulated by the central processing unit and the control unit in collecting the information. In perfecting its operations it contains the following input and out put systems.
Offset; this will be used in counter balancing the memory in between the offset memory and the INC/offset memory location. This is done by operating from the present pointer through cooperation to the offset signal.
INC/offset, the input is the one to dictate where a subsequent instruction should be taken from, while the Clock is an indicator for a systematized operation. The RST is the reorganizing parameter for the indicators of the signal. The ROM ADD (4:0) gives the outcome of the address that is being provided from the ROM and it from this position that the guidelines need to be collected from.
The Random Access Memory (RAM)
This type of module or memory is used to stock up short term data. The signals in this case is their to enhance the data compartment to definite or expected memory location and the address required in accessing the memory is offered by the signal contained in the signal.Moreover, the module transmits the data that has been stored in the RAM by using the Q address, a type of address which is offered via the address bus. Therefore RAM harbors a substantial number of inputs and outputs that comprises;
Data (7:0):8, this is an input data inform of bits and is randomly located and this is determined by the address that permits input in the memory.
Wren: this is a signal that i write enhances the original data and is only reflected on the memory location when the memory signal is operational. Another input data is the Clock which rearranges the circuit while the Q (7:0),is the output information that is retrieved from the memory location that has been addressed.
The Arithmetic and Logic unit (ALU) and Registers
This is the principal module that initiates tube arithmetic and logical processes that are being done in the computer. The information stored is only for a while after which it is conveyed to the home registers that acts as buffers which stocks up data and discharges it after being requested by the control system. The ALU is located in the main processing unit and also in the control unit.
Conclusion
Information system has been an imperative and vital element in the welfare of the humanity and business organization at large. It has enhanced simplicity in the organization and thus ensuring efficiency and effectiveness in the operations.Therefore,organizations ought to embrace this embedded system that will at last ensure the business success. The anticipated structures ought to entail few resources based on the memory capacitance and have fewer functions in relation to the computational dilemma. In achieving the purpose a chronological flow of scheme was to be followed.
